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  rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adm205?dm211/adm213 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? analog devices, inc., 2001 a 0.1  f, 5 v powered cmos rs-232 drivers/receivers features 0.1  f to 10  f capacitors 120 kb/s data rate two receivers active in shutdown (adm213) on-board dc-dc converters  9 v output swing with 5 v supply low power (15 mw) low-power shutdown 5  w  30 v receiver input levels latch-up free plug-in upgrade for max205-211/213 applications computers peripherals modems printers instruments typical operating circuit 0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 16v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm211 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out r5 out en t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in r5 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to ?0v vo ltag e inverter notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input c1+ c1 c2+ c2 v cc v+ v general description the adm2xx family of line drivers/receivers is intended for all eia-232-e and v.28 communications interfaces, especially in appli- cations where 12 v is not available. the adm205, adm206, adm211, and adm213 feature a low power shutdown mode which reduces power dissipation to less than 5 w, making them ideally suited for battery powered equipment. the adm205 does not require any external components and is particularly useful in applications where printed circuit board space is critical. the adm213 has an active-low shutdown and an active-high receiver enable control. two receivers of the adm213 remain active during shutdown. this feature is useful for ring indicator monitoring. all members of the adm2xx family, except the adm209, include two internal charge pump voltage converters which allow operation from a single 5 v supply. these converters convert the 5 v input power to the 10 v required for rs-232 output levels. the adm209 is designed to operate from 5 v and 12 v supplies. an internal +12 v to ?2 v charge pump voltage converter generates the ?2 v supply. table i. selection table no. of no. of low power ttl no. of receivers part power rs-232 rs-232 external shutdown three-state active in number supply voltage drivers receivers capacitors (sd) en shutdown adm205 5 v 5 5 none yes yes 0 adm206 5 v 4 3 4 yes yes 0 adm207 5 v 5 3 4 no no 0 adm208 5 v 4 4 4 no no 0 adm209 5 v and 9 v to 13.2 v 3 5 2 no yes 0 adm211 5 v 4 5 4 yes yes 0 adm213 5 v 4 5 4 yes ( sd ) yes (en) 2
rev. a C2C adm205?dm211/adm213?pecifications parameter min typ max unit test conditions/comments output voltage swing 5 9 volts all transmitter outputs loaded with 3 k ? to ground v cc power supply current 5 13 ma no load 0.4 1 ma no load, adm209 v+ power supply current 3.5 5 ma no load, v+ = 12 v adm209 only shutdown supply current 1 10 a input logic threshold low, v inl 0.8 v t in , en , sd, en, sd input logic threshold high, v inh 2.4 v t in , en , sd, en, sd logic pull-up current 10 25 at in = 0 v rs-232 input voltage range 1 ?0 +30 v rs-232 input threshold low 0.8 1.2 v rs-232 input threshold high 1.7 2.4 v rs-232 input hysteresis 0.25 v rs-232 input resistance 357k ? t a = 0 c to 85 c ttl/cmos output voltage low, v ol 0.4 v i out = 1.6 ma ttl/cmos output voltage high, v oh 3.5 v i out = ?.0 ma ttl/cmos output leakage current 0.05 10 a en = v cc , en = 0 v, 0 v r out v cc output enable time (t en ) 115 ns adm205, adm206, adm209, adm211 (figure 17. c l = 150 pf) output disable time (t dis ) 165 ns adm205, adm206, adm209, adm211 (figure 17. r l = 1 k ? ) propagation delay 0.5 5 s rs-232 to ttl transition region slew rate 8 v/ sr l = 3 k ? , c l = 2500 pf measured from +3 v to ? v or ? v to +3 v output resistance 300 ? v cc = v+ = v?= 0 v, v out = 2 v rs-232 output short circuit current 12 60 ma notes 1 guaranteed by design. specifications subject to change without notice. (v cc = 5 v  10% (206, 207, 208, 2o9, 211, 213); v cc = 5 v  5% (adm205); v+ = 9 v to 13.2 v (adm209); c1?4 = 0.1  f ceramic. all specifications t min to t max unless otherwise noted.) absolute maximum ratings * (t a = 25 c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ?.3 v to +6 v v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (v cc ?0.3 v) to +14 v v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to ?4 v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . ?.3 v to (v cc + 0.3 v) r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 v output voltages t out . . . . . . . . . . . . . . . . . . (v+, + 0.3 v) to (v? ?.3 v) r out . . . . . . . . . . . . . . . . . . . . . . . ?.3 v to (v cc + 0.3 v) short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous power dissipation n-24 dip (derate 13.5 mw/ c above 70 c) . . . 1000 mw n-24a dip (derate 13.5 mw/ c above 70 c) . . . 500 mw r-24 soic (derate 12 mw/ c above 70 c) . . . . . 850 mw r-28 soic (derate 12.5 mw/ c above 70 c) . . . 900 mw rs-28 ssop (derate 10 mw/ c above 70 c) . . . . 900 mw q-24 cerdip (derate 12.5 mw/ c above 70 c) . . . 1000 mw d-24 ceramic (derate 20 mw/ c above 70 c) . . . 1000 mw thermal impedance, ja n-24 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 c/w n-24a dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 c/w r-24 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 c/w r-28 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 c/w rs-28 ssop . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-14 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w q-16 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-20 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-24 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 c/w d-24 ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 c/w operating temperature range industrial (a version) . . . . . . . . . . . . . . . ?0 c to +85 c storage temperature range . . . . . . . . . . . . ?5 c to +150 c lead temperature, soldering . . . . . . . . . . . . . . . . . . . 300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c * this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adm205?dm211/adm213 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
rev. a adm205 adm211/adm213 C3C ordering guide temperature package temperature package temperature package model range option * model range option * model range option * adm205 adm206 adm207 adm205an ?0 c to +85 c n-24a adm206an ?0 c to +85 c n-24 adm207an ?0 c to +85 c n-24 adm206ar ?0 c to +85 c r-24 adm207ar ?0 c to +85 c r-24 adm206ars ?0 c to +85 c rs-24 adm207ars ?0 c to +85 c rs-24 adm208 adm209 adm211 adm208an ?0 c to +85 c n-24 adm209an ?0 c to +85 c n-24 adm211ar ?0 c to +85 c r-28 adm208ar ?0 c to +85 c r-24 adm209ar ?0 c to +85 c r-24 adm211ars ?0 c to +85 c rs-28 adm208ars ?0 c to +85 c rs-24 adm209ars ?0 c to +85 c rs-24 adm213 adm213ar ?0 c to +85 c r-28 adm213ars ?0 c to +85 c rs-28 * n = plastic dip; r = small outline ic (soic); rs = small shrink outline package (ssop). top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm205 v cc gnd r1 in r1 out t1 in t4 out t3 out t1 out t2 out t2 in r2 out r2 in r5 in r5 out t3 in t4 in r4 out r3 in r3 out t5 in sd r4 in t5 out en figure 1. adm205 dip pin configuration + 0.1  f 5v input v cc t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm205 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out r5 out en t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in r5 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input t5 t5 in t5 out figure 2. adm205 typical operating circuit
adm205 adm211/adm213 C4C rev. a top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm206 c1 v+ c1+ v cc gnd t3 out t1 out t2 out r1 in t1 in t2 in r1 out c2+ c2 v r3 in r3 out t4 out r2 in r2 out sd t3 in t4 in en figure 3. adm206 dip/soic/ssop pin configuration 0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 6.3v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 gnd adm206 t1 in t2 in t3 in t4 in r1 out r2 out r3 out en t1 out t2 out t3 out t4 out r1 in r2 in r3 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to 10v vo ltag e inverter c1+ c1 c2+ c2 v cc v+ v notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input figure 4. adm206 typical operating circuit top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm207 c1 v+ c1+ v cc gnd t3 out t1 out t2 out r1 in t1 in t2 in r1 out c2+ c2 v r3 in r3 out t4 out r2 in r2 out t5 in t3 in t4 in t5 out %
) '"(2*01-+011-**+ 
  0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 6.3v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 gnd adm207 t1 in t2 in t3 in t4 in r1 out r2 out r3 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to 10v vo ltag e inverter notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input c1+ c1 c2+ c2 v cc v+ v t5 t5 in t5 out figure 6. adm207 typical operating circuit
rev. a adm205 adm211/adm213 C5C top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm208 c1 v+ c1+ v cc gnd t2 out t1 out r2 in r2 out r1 in r1 out t1 in c2+ c2 v r4 in r4 out t3 out r3 in r3 out t4 in t2 in t3 in t4 out figure 7. adm208 dip/soic/ssop pin configuration 0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 6.3v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 r4 gnd adm208 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to 10v vo ltag e inverter notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input c1+ c1 c2+ c2 v cc v+ v figure 8. adm208 typical operating circuit top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm209 r4 in r4 out r5 out r5 in v r1 out r1 in gnd v cc c c+ v+ t3 out en nc t3 in r3 out t1 in t2 in r2 out r2 in r3 in t1 out t2 out figure 9. adm209 dip/soic/ssop pin configuration 0.1  f 16v + c1+ c1 + 0.1  f 5v input 0.1  f 16v t1 t2 t3 r1 r2 r3 r4 r5 gnd adm209 t1 in t2 in t3 in r1 out r2 out r3 out r4 out r5 out en t1 out t2 out t3 out r1 in r2 in r3 in r4 in r5 in nc ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +12v to 12v vo ltag e inverter notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input v cc v+ v + 9v to 13.2v input figure 10. adm209 typical operating circuit
adm205 adm211/adm213 C6C rev. a top view (not to scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 adm211 t3 out t1 out t4 out r3 in t2 out r2 in r3 out sd r2 out t2 in en r4 in t1 in r1 out r4 out t4 in r1 in gnd t3 in r5 out v cc c1+ r5 in v v+ c1 c2 c2+ figure 11. adm211 soic/ssop pin configuration 0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 16v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm211 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out r5 out en t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in r5 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to 10v vo ltag e inverter notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input c1+ c1 c2+ c2 v cc v+ v figure 12. adm211 typical operating circuit top view (not to scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 adm213 t3 out t1 out t4 out r3 in t2 out r2 in r3 out sd r2 out t2 in en r4 in * t1 in r1 out r4 out * t4 in r1 in gnd t3 in r5 out * v cc c1+ r5 in * v v+ c1 c2 c2+ * active in shutdown figure 13. adm213 soic/ssop pin configuration 0.1  f 6.3v + + 0.1  f 5v input + 0.1  f 16v 0.1  f 16v + 0.1  f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm213 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out 3 r5 out 3 en t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in 3 r5 in 3 sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo ltag e doubler +10v to 10v vo ltag e inverter c1+ c1 c2+ c2 v cc v+ v notes 1 internal 400k  pull-up resistor on each ttl/cmos input 2 internal 5k  pull-down resistor on each rs-232 input 3 active in shutdown figure 14. adm213 typical operating circuit
rev. a adm205 adm211/adm213 C7C pin function descriptions mnemonic function v cc power supply input 5 v 10% (5 v 5% adm205). v+ internally generated positive supply (10 v nominal) on all parts except adm209. adm209 requires external 9 v to 13.2 v supply. v internally generated negative supply (?0 v nominal). gnd ground pin. must be connected to 0 v. c+ (adm209 only) external capacitor (+ terminal) is connected to this pin. c (adm209 only) external capacitor (?terminal) is connected to this pin. c1+ (adm206, adm207, adm208, adm211, adm213) external capacitor (+ terminal) is connected to this pin. c1 (adm206, adm207, adm208, adm211, adm213) external capacitor (?terminal) is connected to this pin. c2+ (adm206, adm207, adm208, adm211, adm213) external capacitor (+ terminal) is connected to this pin. c2 (adm206, adm207, adm208, adm211, adm213) external capacitor (?terminal) is connected to this pin. t in transmitter (driver) inputs. these inputs accept ttl/cmos levels. an internal 400 k ? pull-up resistor to v cc is connected on each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 10 v). r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k ? pull-down resistor to gnd is con- nected on each input. r out receiver outputs. these are ttl/cmos levels. en /en enable input. active low on adm205, adm206, adm209, adm211. active high on adm213. this input is used to enable/disable the receiver outputs. with en = low (en = high adm213), the receiver outputs are enabled. with en = high (en = low adm213), the outputs are placed in a high impedance state. this facility is useful for connecting to microprocessor systems. sd/ sd shutdown input. active high on adm205, adm206, adm211. active low on adm213. with sd = high on the adm205, adm206, adm211, the charge pump is disabled, the receiver outputs are placed in a high impedance state and the driver outputs are turned off. with sd low on the adm213, the charge pump is disabled, the driver outputs are turned off and all receivers except r4 and r5 are placed in a high impedance state. in shutdown, the power consumption reduces to 5 w. nc no connect. no connections are required to this pin. table ii. adm205, adm206, adm211 truth table sd en status transmitters t1?5 receivers r1?5 0 0 normal operation enabled enabled 0 1 normal operation enabled disabled 1 0 shutdown disabled disabled table iii. adm213 truth table sd en status transmitters t1-t4 receivers r1-r3 receivers r4, r5 0 0 shutdown disabled disabled disabled 0 1 shutdown disabled disabled enabled 1 0 normal operation enabled disabled disabled 1 1 normal operation enabled enabled enabled
adm205 adm211/adm213 C8C rev. a load current ma 15 510 v+/v v v+ 15 v 20 0 10 5 0 5 10 15 tpc 1. charge pump v+, vC vs. load current load capacitance pf 0 0 500 slew rate v/  s 5 negative slew 50 1000 10 15 20 25 30 35 40 45 positive slew 1500 2000 2500 3000 tpc 2. transmitter slew rate vs. load capacitance v cc v 9 4.0 4.5 tx o/p v 5.0 5.5 6.0 7 5 3 1 1 3 5 7 9 tx o/p hi loaded tx o/p lo loaded 0 tpc 3. transmitter output voltage vs. v cc load current ma 15 02 tx o/p v tx o/p hi 468 10 5 0 5 10 15 tx o/p lo 10 tpc 4. transmitter output voltage vs. load current v cc v 0 4.5 4.7 impedance  200 100 50 v+ imp v imp 150 250 300 350 4.9 5.1 5.3 5.5 tpc 5. charge pump impedance vs. v cc
rev. a adm205 adm211/adm213 C9C 1 ch1 ch3 5.00v 5.00v b w ch2 5.00v m50.0  s ch1 3.1v v+, v exiting sd t t t sd v+ v 2 3 tpc 6. charge pump, v+, vC exiting shutdown 1 ch1 5.00v ch2 5.00v m1.00  s ch1 800mv t t tx output tx input 2 tpc 7. transmitter output loaded slew rate 1 ch1 5.00v ch2 5.00v m1.00  s ch1 800mv t t tx output tx input 2 tpc 8. transmitter output unloaded slew rate general information the adm205-adm211 and adm213 family of rs-232 driv- ers/receivers are designed to solve interface problems by meeting the eia-232-e specifications while using a single digital 5 v supply. the eia-232-e standard requires transmitters which will deliver 5 v minimum on the transmission channel and receivers which can accept signal levels down to 3 v. the adm205-adm211 and adm213 meet these requirements by integrating step up voltage converters and level shifting trans- mitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. a comprehensive range of transmitter/receiver combinations is available to cover most communications needs. the adm205 adm211 and adm213 are modifications, enhancements and improvements to the ad230?d241 family and derivatives thereof. they are essentially plug-in compatible and do not have materially different applications. the adm205, adm206, adm211, and adm213 are particu- larly useful in battery-powered systems as they feature a low power shutdown mode which reduces power dissipation to less than 5 w. the adm205 is designed for applications where space saving is important as the charge pump capacitors are molded into the package. the adm209 includes only a negative charge pump converter and are intended for applications where a positive 12 v is available. to facilitate sharing a common line or for connection to a micro- proc essor data bus, the adm205, adm 206, adm209, adm211, and adm213 feature an enable ( en ) function. when disabled, the receiver outputs are placed in a high impedance state. circuit description the internal circuitry in the adm205-adm211 and adm213 consists of three main sections. these are: (a) a charge pump voltage converter (b) rs-232 to ttl/cmos receivers (c) ttl/cmos to rs-232 transmitters charge pump dc-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages using a switched capacitor technique as illustrated in figures 15 and 16. first, the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the 10 v level is then inverted to generate ?0 v using c2 as the storage element. + + v cc gnd s1 s2 c1 s3 s4 c3 v cc v+ = 2v cc internal oscillator figure 15. charge-pump voltage doubler + + v+ gnd s1 s2 c2 s3 s4 c4 gnd v = (v+) internal oscillator from vo ltag e doubler %
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9*   

capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output imped- ance on the v+ and v?supplies. the v+ and v?supplies may also be used to power external circuitry if the current requirements are small.
adm205 adm211/adm213 C10C rev. a transmitter (driver) section the drivers convert ttl/cmos input levels into eia-232-e output levels. with v cc = 5 v and driving a typical eia-232-e load, the output voltage swing is 9 v. even under worst-case conditions the drivers are guaranteed to meet the 5 v eia-232-e minimum requirement. the input threshold levels are both ttl- and cmos-compatible with the switching threshold set at v cc /4. with a nominal v cc = 5 v the switching threshold is 1.25 v typical. unused inputs may be left unconnected, as an internal 400 k ? pull-up resistor pulls them high, forcing the outputs into a low state. as required by the eia-232-e standard, the slew rate is limited to less than 30 v/ s without the need for an external slew limit- ing capacitor and the output impedance in the power-off state is greater than 300 ? . receiver section the receivers are inverting level shifters which accept eia -232-e input levels ( 5 v to 15 v) and translate them into 5 v ttl/ cmos levels. the inputs have internal 5 k ? pull-down resistors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v minimum and 2.4 v maximum which are well within the 3 v eia-232-e requirement. the low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level. the receivers have schmitt trigger inputs with a hysteresis level of 0.5 v. this ensures error-free reception for both noisy inputs and for inputs with slow transition times. shutdown (sd) the adm205, adm206, adm211, and adm213 feature a control input which may be used to disable the part and reduce the power consumption to less than 5 w. this is very useful in battery operated systems. during shutdown the charge pump is turned off, the transmitters are disabled and all receivers except r4 and r5 on the adm213 are put into a high-impedance dis- abled state. receivers r4 and r5 on the adm213 remain enabled during shutdown. this feature allows monitoring external activ- ity such as ring indicator monitoring while the device is in a low power shutdown mode. the shutdown control input is active high on all parts except the adm213 where it is active low. refer to tables ii and iii. enable input the adm205, adm209, adm211, and adm213 feature an enable input used to enable or disable the receiver outputs. the enable input is active low on the adm205, adm209, adm211 and active-high on the adm213. refer to tables ii and iii. when disabled, all receiver outputs are placed in a high impedance state. this function allows the outputs to be connected directly to a microprocessor data bus. it can also be used to allow receivers from different devices to share a common data line. the timing diagram for the enable function is shown in figure 17. 3v 0v r out en * t en t dis v oh 0.1v v ol + 0.1v 3.5v 0.8v * polarity of en is reversed for adm213. figure 17. enable timing application hints driving long cables in accordance with the eia-232-e standard, long cables are permissible provided that the total load capacitance does not exceed 2500 pf. for longer cables which do exceed this, then it is possible to trade off baud rate vs. cable length. large load capacitances cause a reduction in slew rate, and hence the maximum transmission baud rate is decreased. the adm205?dm211 and adm213 are designed so that the slew rate reduction with increasing load capacitance is minimized. for the receivers, it is important that a high level of noise immu- nity be inbuilt so that slow rise and fall times do not cause multiple output transitions as the signal passes slowly through the transi- tion region. the adm205?dm211 and adm213 have 0.5 v of hysteresis to guard against this. this ensures that, even in noisy environments, error-free reception can be achieved. high baud rate operation the adm205?dm211 and adm213 feature high slew rates permitting data transmission at rates well in excess of the eia- 232-e specification. the drivers maintain 5 v signal levels at data rates up to 120 kb/s under worst-case loading conditions.
rev. a adm205 adm211/adm213 C11C outline dimensions dimensions shown in inches and (mm). 24-lead plastic dip (n-24) pin 1 24 1 13 12 0.260 0.001 (6.61 0.03) 0.32 (8.128) 0.30 (7.62) 0.011 (0.28) 0.009 (0.23) 15  0 0.02 (0.5) 0.016 (0.41) 0.130 (3.30) 0.128 (3.25) 0.07 (1.78) 0.05 (1.27) seating plane 1.228 (31.19) 1.226 (31.14) 0.11 (2.79) 0.09 (2.28) notes 1. lead no. 1 identified by dot or notch 2. plastic leads will be either solder dipped or tin plated in accordance with mil-m-38510 requirements. 24-lead plastic dip (n-24a) pin 1 0.55 (13.97) 0.53 (13.47) 24 1 13 12 0.606 (15.4) 0.594 (15.09) 0.012 (0.305) 0.008 (0.203) 15  0  0.16 (4.07) 0.14 (3.56) 0.2 (5.08) max 0.065 (1.66) 0.045 (1.15) 0.105 (2.67) 0.095 (2.42) 1.25 (31.75) 1.24 (31.5) 0.02 (0.508) 0.015 (0.381) 0.175 (4.45) 0.12 (3.05) seating plane 24-lead ssop (rs-24) 0.328 (8.33) 0.318 (8.08) 0.0256 (0.65) bsc 0.07 (1.78) 0.066 (1.67) 0.008 (0.203) 0.002 (0.050) notes 1. lead no. 1 identified by a dot. 2. leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 0.009 (0.229) 0.005 (0.127) 0.037 (0.94) 0.022 (0.559) 8  0  pin 1 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.207) 1 24 13 12 24-lead cerdip (q-24) 0.320 (8.128) 0.290 (7.366) 15  0  0.012 (0.305) 0.008 (0.203) typ pin 1 1 24 12 13 0.295 (7.493) max 0.225 (5.715) max 0.125 (3.175) min 0.070 (1.778) 0.020 (0.508) 0.180 (4.572) max seating plane 1.290 (32.77) max 0.021 (0.533) 0.015 (0.381) typ 0.065 (1.651) 0.055 (1.397) typ 0.110 (2.794) 0.090 (2.286) typ notes 1. lead no. 1 identified by dot or notch. 2. cerdip leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 24-lead soic (r-24) 0.03 (0.76) 0.02 (0.51) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.447) 6  0  pin 1 13 12 1 24 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) notes 1. lead no. 1 identified by a dot. 2. soic leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.096 (2.44) 0.089 (2.26) 0.608 (15.45) 0.596 (15.13) 0.01 (0.254) 0.006 (0.15)
rev. a C12C c00067C0C4/01(a) printed in u.s.a. adm205 adm211/adm213 28-lead soic (r-28) 0.03 (0.76) 0.02 (0.51) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.457) 6  0  0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.708 (18.02) 0.696 (17.67) 0.01 (0.254) 0.006 (0.15) 0.096 (2.44) 0.089 (2.26) pin 1 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) 14 1 15 28 notes 1. lead no. 1 identified by a dot. 2. soic leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 28-lead ssop (rs-28) 0.407 (10.34) 0.397 (10.08) 0.0256 (0.65) bsc 0.008 (0.203) 0.002 (0.050) 0.07 (1.78) 0.066 (1.67) notes 1. lead no. 1 identified by a dot. 2. leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 0.009 (0.229) 0.005 (0.127) 0.037 (0.94) 0.022 (0.559) 8  0  pin 1 15 14 1 28 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.207) adm205 adm211/adm213 revision history location page data sheet changed from rev. 0 to rev. a. updated figures. changes to numbers in min/typ/max column of specification page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2


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